专利名称：MICROPROCESSOR SYSTEM发明人：SUGANO HIRONORI申请号：JP546291申请日：19910122公开号：JPH04237346A公开日：19920825
摘要：PURPOSE:To reduce the size and price of a circuit by combining a working RAMto be used at the time of executing a program and a 2-port RAM to be used also as anI/O controlling RAM for a register image as one RAM. CONSTITUTION:The 2-port RAM 3acting also as a I/O control is used also as a working RAM. A circuit 5 for finding out ORoperation between a chip select(CS) signal outputted from a microprocessor 1 and an I/Orequest is added and an output from the OR circuit 5 is inputted to the enable terminalEN of an address decoder 4 and decoded. In the case of accessing from the
microprocessor 1 to the working memory and the I/0, the output of the decoder 4 isused as an address and the same 2-port RAM 3 is accessed by writing/ reading. Since the2-port RAM 3 having an area combining both of a working area necessary for themicroprocessor 1 and an I/O control area to be a register is used, operation is executedonly by one RAM.
申请人：FUJITSU LTD
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