LV8727_datasheet

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Ordering number : ENA1998

LV8727

Overview

Bi-CMOS LSI

PWM Current Control Stepping Motor Driver

The LV8727 is a PWM current-controlled micro step bipolar stepping motor driver. This driver can do eight ways of micro step resolution of Half, 1/8, 1/16, 1/32, 1/64, 1/128, 1/10, 1/20 Step, and can drive simply by the step input.

Features

• Single-channel PWM current control stepping motor driver.

• Output on-resistance (upper side : 0.25Ω ; lower side : 0.15Ω ; total of upper and lower : 0.4Ω ; Ta = 25°C, IO = 4.0A) • Half, 1/8, 1/16, 1/32, 1/64, 1/128, 1/10, 1/20 Step are selectable. • Advance the excitation step with the only step signal input. • BiCDMOS process IC. • Available forward reverse control.

• Thermal shutdown circuit. • IO max=4.0A

• Input pull down resistance • With reset pin and enable pin.

Specifications

Absolute Maximum Ratings at Ta = 25°C

Parameter Symbol Supply voltage Output current Output peak current Logic input voltage VREF input voltage

MO / DOWN pin input voltage Allowable power dissipation Operating temperature Storage temperature

VM max IO max IO peak VIN max VREF max VMO /VDOWN max Pd max Topr Tstg

tw≤10ms, duty 20%

Indipendent IC

Conditions 5044.66662.45-30 to +85-55 to +150

V A A V V V W °C °C

Ratings Unit Caution 1) Absolute maximum ratings represent the value which cannot be exceeded for any length of time.

Caution 2) Even when the device is used within the range of absolute maximum ratings, as a result of continuous usage under high temperature, high current, high

voltage, or drastic temperature change, the reliability of the IC may be degraded. Please contact us for the further details.

AnyandallSANYOSemiconductorCo.,Ltd.productsdescribedorcontainedhereinare,withregardto\"standardapplication\intendedfortheuseasgeneralelectronicsequipment.Theproductsmentionedhereinshallnotbeintendedforuseforany\"specialapplication\"(medicalequipmentwhosepurposeistosustainlife,aerospaceinstrument,nuclearcontroldevice,burningappliances,transportationmachine,trafficsignalsystem,safetyequipmentetc.)thatshallrequireextremelyhighlevelofreliabilityandcandirectlythreatenhumanlivesincaseoffailureormalfunctionoftheproductormaycauseharmtohumanbodies,norshalltheygrantanyguaranteethereof.Ifyoushouldintendtouseourproductsfornewintroductionorotherapplicationdifferentfromcurrentconditionsontheusageofautomotivedevice,communicationdevice,officeequipment,industrialequipmentetc.,pleaseconsultwithusaboutusagecondition(temperature,operationtimeetc.)priortotheintendeduse.Ifthereisnoconsultationorinquirybeforetheintendeduse,ourcustomershallbesolelyresponsible for the use.SpecificationsofanyandallSANYOSemiconductorCo.,Ltd.productsdescribedorcontainedhereinstipulatetheperformance,characteristics,andfunctionsofthedescribedproductsintheindependentstate,andarenotguaranteesoftheperformance,characteristics,andfunctionsofthedescribedproductsasmountedinthecustomer'sproductsorequipment.Toverifysymptomsandstatesthatcannotbeevaluatedinanindependentdevice,thecustomershouldalwaysevaluateandtestdevicesmountedinthecustomer'sproductsorequipment.N1611 SY 20111019-S00003 No.A1998-1/23

LV8727

Recommendation Operating Ratings at Ta = 25°C

Parameter Symbol Supply voltage range Logic input voltage VREF input voltage range

VM VIN VREF

Conditions

Ratings Unit 9 to 450 to 50 to 3

V V V

Electrical Characteristics at Ta = 25°C, VM = 24V, VREF = 1.5V

Parameter Symbol Standby mode current drain Current drain

Thermal shutdown temperature Thermal hysteresis width Logic pin input current

IMst IM TSD

ST = “L”

ST = “H”, OE = “H”, no load Design guarantee

150

Conditions

Unit

min typ max 70 3.5 180

1004.9200

μA mA °C °C

1570

μA μA

V V V

V V kHz μA

V V μA

200200

mV mV Hz μA

V V Ω Ω μA V V

Ratings

ΔTSD Design guarantee IINL VIN = 0.8V IINH VIN = 5V VINH VINL Vfdth

3.51.13302.0

40 8 50

Logic high-level input voltage Logic low-level input voltage FDT pin high-level voltage

0.8

3.1

0.813013

FDT pin middle-level voltage Vfdtm FDT pin low-level voltage Chopping frequency

OSC1 pin charge/discharge current Chopping oscillation circuit threshold voltage VREF pin input voltage DOWN output residual voltagr MO pin residual voltage Hold current switching frequency OSC2 pin charge/discharge current Hold current switching frequency threshold voltage Output on-resistance

Vfdtl Fch Iosc1

Cosc1 = 100pF

7070.80.3-0.5

100 10

Vtup1 Vtdown1 Iref VO1DOWN VO1MO Iosc2

VREF = 1.5V Idown = 1mA Imo = 1mA

1 1.20.5 50 50

0.7

Fdown Cosc2 = 1500pF

1.1270.80.3

1.6 2.0810

Vtup2 Vtdown2 Ronu

IO = 4.0A, high-side ON resistance

1 1.20.5 0.25 0.15

0.70.3250.195501.30.515

Rond IO = 4.0A, low-side ON resistance

Output leakage current Diode forward voltage

Current setting reference voltage

IOleak VM = 50V VD VRF

ID = -4.0A

VREF = 1.5V, Current ratio 100%

0.485

0.5

No.A1998-2/23

LV8727

Package Dimensions

unit : mm (typ) 3236A 1 (2.6)

(12.3)(5.0)29.225.6(22.8)(8.5)( 2.5)4.5(R1.7)18.6 max(14.4)(11.0)21.70.4253.5(1.0)0.524.04.22.02.0SANYO :HZIP25

Allowable power dissipation, Pd max - W

3.0Pd max - Ta2.452.01.271.00— 300306090120Ambient temperature, Ta - C14.5No.A1998-3/23

Block Diagram

+-RF1OUT1AOUT2BOUT1BVM1VM2OUT2ARF2Regulator 2PGND1PGND2Output pre stageOutput pre stageOutput pre stageOutput pre stageMODOWNRegulator 1-+VREF+-OscllatorTSDOSC1OSC2MD1MD2MD3FRSTEPRSTOEFDTCurrent selectcircuitOutput control logic-+Current selectcircuitDecay Modesetting circuitLV8727

SGNDSTNo.A1998-4/23

LV8727

Pin Assignment

Pin Functions OUT1BRF1Pin No. 7 8 9 10 11 12 13 Pin Name MD1 MD2 MD3 OE RST FR STEP LV8727345678910111213141516171819202122232425VM1PGND1MD1OUT2BPGND2OUT1ATop viewPin Functtion Equivalent Circuit Excitation mode switching pin Excitation mode switching pin Excitation mode switching pin Output enable signal input pin Reset signal input pin Forward / Reverse signal input pin Clock pulse signal input pinInternal 5Vregulator GND6 ST Chip enable input pin. Internal 5VregulatorGND1 2 3 4 5 21 22 23 24 25 OUT1B RF1 PGND1 OUT1A VM1 VM2 OUT2B PGND2 RF2 OUT2A Channel 1 OUTB output pin. Channel 1 current-sense resistor connection pin. Channel 1 power GND Channel 1 OUTA output pin. Channel 1 motor supply connect pin Channel 2 motor supply connect pin Channel 2 OUTB output pin. Channel 2 power GND Channel 2 current-sense resistor connection pin. Channel 2 OUTA output pin. 425521122323224GNDContinued on next page.

No.A1998-5/23

OUT2A OSC1DOWNVREFMD2MD3SGNDOSC2STEPRSTVM2FDTRF2MOOEFRSTLV8727

Continued from preceding page. Pin No. Pin Name 19 VREF Constant-current control reference voltage input pin. Pin Functtion Equivalent Circuit Internal 5VregulatorGND 17 18 DOWN MO Holding current output pin. Position detecting monitor pin. Internal 5VregulatorGND 14 15 OSC1 OSC2 Chopping frequency setting capacitor connection pin.Holding current detection time setting capacitor connection pin. Internal 5VregulatorGND 16 FDT Decay mode select voltage input Internal 5VregulatorGND No.A1998-6/23

LV8727

Reference describing operation

(1) Stand-by function

When ST pin is at low levels, the IC enters stand-by mode, all logic is reset and output is turned OFF. When ST pin is at high levels, the stand-by mode is released.

(2) STEP pin function

STEP input advances electrical angle at every nising edge (advances step by step).

Input Operating mode ST STEP Low * High High Excitation step is kept Standby mode Excitation step proceeds

(3) Excitation setting method

Set the excitation setting as shown in the following table by setting MD1 pin, MD2 pin and MD3 pin.

Input

Mode

Initial position

1ch current 2ch current 100% 100%100%100%100%100%100%100%

0% 0% 0% 0% 0% 0% 0% 0%

MD3 MD2 MD1 (Excitation) Low Low Low Low Low High Low High Low Low High High High Low Low High Low High High High Low High High High Half 1/8 1/16 1/32 1/64 1/128 1/10 1/20 The initial position is also the default state at start-up and excitation position at counter-reset in each Micro step

resolution.

(4) MO output pin

MO output pin serves as open-drain connection.

If MO pin will be in the state of an initial position, it is turned on, and it outputs a Low level.

Excitation position Initial position Other initial position

MO Low OPEN

(5) Output current setting

Output current is set shown below by the VREF pin (applied voltage) and a resistance value between RF1(2) pin and GND.

IOUT = ( VREF / 3 ) / RF1 (2) resistance

* The setting value above is a 100% output current in each excitation mode. (Example) When VREF = 0.9V and RF1 (2) resistance is 0.1Ω, the setting is shown below.

IOUT = ( 0.9V / 3 ) / 0.1Ω = 3A

No.A1998-7/23

LV8727

(6) Output enable function

When the OE pin is set Low, the output is forced OFF and goes to high impedance. However, the internal logic circuits are operating, so the excitation position proceeds when the STP is input. Therefore, when OE pin is returned to High, the output level conforms to the excitation position proceeded by the STEP input.

OE Operation mode L Output: OFF H Output: ON

OESTEPMOPower save mode1ch output0%2ch outputOutput is high-impedance(7) Reset function

When the RST pin is set Low, the output goes to initial mode and excitation position is fixed in the initial position for STEP pin and FR pin input. MO pin outputs at low levels at the initial position. (Open drain connection)

RST Operation mode H Normal operation L Reset state

RSTSTEPMORESET1ch output0%2ch outputInitial stateNo.A1998-8/23

LV8727

(8) Forward / reverse switching function

FR Operating mode Low Clockwise (CW) High Counter-clockwise (CCW)

FRCW modeCCW modeCW modeSTEPExcitation position(1)(2)(3)(4)(5)(6)(5)(4)(3)(4)(5)1ch output2ch outputThe internal D/A converter proceeds by a bit on the rising edge of the step signal input to the STEP pin. In addition, CW and CCW mode are switched by FR pin setting.

In CW mode, the channel 2 current phase is delayed by 90° relative to the channel 1 current. In CCW mode, the channel 2 current phase is advanced by 90° relative to the channel 1 current. (9) DECAY mode setting

Current DECAY method is selectable as shown below by applied voltage to the FDT pin.

FDT voltage 3.5V to

1.1V to 3.1V or OPEN

To 0.8V

DECAY method SLOW DECAY MIXED DECAY FAST DECAY

(10) Chopping frequency setting function

Chopping frequency is set as shown below by a capacitor between OSC1 pin and GND.

Fcp = 1 / ( Cosc1 / 10 х 10-6 ) (Hz) (Example) When Cosc1 = 180pF, the chopping frequency is shown below.

Fcp = 1 / ( 180 х 10-12 / 10 х 10-6 ) = 55.6(kHz)

No.A1998-9/23

LV8727

(11) Output current in each micro step resolution

Output current vector locus (one step is normalized to 90 degrees) Half, 1/8, 1/16, 1/32, 1/64, 1/128 Step

100.0

66.7

33.3

0.0 0.033.366.7 Channel 2 current ratio (%)

Current setting ratio in each micro step resolution

Channel 1 current ratio (%)STEP

(%) 1/32 (%)1/128 (%) 1/64 1ch 2ch 1ch2ch 1ch 2chθ0 100 0 1000 100 0θ1 100 1 θ2 100 2 1002 θ3 100 4 θ4 100 5 1005 100 5θ5 100 6 θ6 100 7 1007 θ7 100 9 θ8 100 10 10010 100 10θ9 99 11 θ10 99 12 99 12 θ11 99 13 θ12 99 15 99 15 99 15θ13 99 16 θ14 99 17 99 17 θ15 98 18 θ16 98 20 98 20 98 20θ17 98 21 θ18 98 22 98 22 θ19 97 23 θ20 97 24 97 24 97 24θ21 97 25 θ22 96 27 96 27 θ23 96 28 θ24 96 29 96 29 96 29θ25 95 30 1ch100

1/16 (%)

2ch0

1/8(%)1ch2ch1000

100.010010

98209820

9629

Half(%)

1ch2ch 1000 Continued on next page.

No.A1998-10/23

LV8727

Continued from preceding page. STEP

1/128 (%) 1/64 (%) 1/32(%)1ch 2ch 1ch2ch 1ch 2chθ26 95 31 9531 θ27 95 33 θ28 94 34 9434 94 34θ29 94 35 θ30 93 36 9336 θ31 93 37 θ32 92 38 9238 92 38θ33 92 39 θ34 91 41 9141 θ35 91 42 θ36 90 43 9043 90 43θ37 90 44 θ38 89 45 8945 θ39 89 46 θ40 88 47 8847 88 47θ41 88 48 θ42 87 49 8749 θ43 86 50 θ44 86 51 8651 86 51θ45 85 52 θ46 84 53 8453 θ47 84 55 θ48 83 56 8356 83 56θ49 82 57 θ50 82 58 8258 θ51 81 59 θ52 80 60 8060 80 60θ53 80 61 θ54 79 62 7962 θ55 78 62 θ56 77 63 7763 77 63θ57 77 64 θ58 76 65 7665 θ59 75 66 θ60 74 67 7467 74 67θ61 73 68 θ62 72 69 7269 θ63 72 70 θ64 71 71 7171 71 71θ65 70 72 θ66 69 72 6972 θ67 68 73 θ68 67 74 6774 67 74θ69 66 75 θ70 65 76 6576 θ71 64 77 θ72 63 77 6377 63 77θ73 62 78 θ74 62 79 6279 θ75 61 80 θ76 60 80 6080 60 80θ77 59 81 θ78 58 82 5882 θ79 57 82 θ80 56 83 5683 56 83θ81 55 84 θ82 53 84 5384 θ83 52 85 θ84 51 86 5186 51 86θ85 50 86 θ86 49 87 4987 θ87 48 88 θ88 47 88 4788 47 88θ89 46 89 θ90 45 89 4589 1/16(%)

1ch2ch

1/8(%)

1ch2ch

Halfe (%)

1ch2ch 7171 92389238

8847

83568356

7763

71717171

6377

56835683

4788

Continued on next page.

No.A1998-11/23

LV8727

Continued from preceding page. STEP

1/128 (%) 1/64 (%) 1/32(%)1ch 2ch 1ch2ch 1ch 2chθ91 44 90 θ92 43 90 4390 43 90θ93 42 91 θ94 41 91 4191 θ95 39 92 θ96 38 92 3892 38 92θ97 37 93 θ98 36 93 3693 θ99 35 94 θ100 34 94 3494 34 94θ101 33 95 θ102 31 95 3195 θ103 30 95 θ104 29 96 2996 29 96θ105 28 96 θ106 27 96 2796 θ107 25 97 θ108 24 97 2497 24 97θ109 23 97 θ110 22 98 2298 θ111 21 98 θ112 20 98 2098 20 98θ113 18 98 θ114 17 99 1799 θ115 16 99 θ116 15 99 1599 15 99θ117 13 99 θ118 12 99 1299 θ119 11 99 θ120 10 100 10100 10 100θ121 9 100 θ122 7 100 7100 θ123 6 100 θ124 5 100 5100 5 100θ125 4 100 θ126 2 100 2100 θ127 1 100 θ128 0 100 0100 0 100

1/16(%)

1ch2ch

1/8(%)

1ch2ch

Half(%)

1ch2ch 0100 38923892

2996

20982098

10100

01000100

No.A1998-12/23

LV8727

Output current vector locus (one step is normalized to 90 degrees) 1/10, 1/20 STEP

100.0

66.7

33.3 0.00.033.366.7

Channel 2 current ratio (%)

Current setting ratio in each micro step resolution 1/10, 1/20 STEP

Channel 1 current ratio (%)STEP

1/20 (%)1ch 2chθ0 100 0θ1 100 8θ2 99 16θ3 97 23θ4 95 31θ5 92 38θ6 89 45θ7 85 52θ8 81 59θ9 76 65θ10 71 71θ11 65 76θ12 59 81θ13 52 85θ14 45 89θ15 38 92θ16 31 95θ17 23 97θ18 16 99θ19 8 100θ20 0 1001/10 (%)

1ch 2ch 100 0 99 16 95 31 89 45 81 59 71 71 59 81 45 89 31 95 16 99 0 100 100.0

No.A1998-13/23

LV8727

(12) Current wave example in each micro step resolution (Half, 1/16, 1/128, 1/20 STEP)

Half STEP (CW mode)

STEP

(%)

100 I10 -100

(%) 100 I20 -100

1/16 STEP (CW mode)

STEP MO

(%)

100

50 I10-50-100(%)10050I20-50-100No.A1998-14/23

LV8727

1/128 STEP ( CW mode ) STEP MO I1 I2 STEP MO

(%)100500-50-100(%)100500-50-1001/20 STEP ( CW mode )

(%)10050I10-50-100(%)10050I20-50-100No.A1998-15/23

LV8727

(13) Current control operation

SLOW DECAY current control operation

When FDT pin voltage is a voltage over 3.5V, the constant-current control is operated in SLOW DECAY mode. ( Sine-wave increasing direction )

STEP Setting current

Setting current

Coil current Chopping period

Blanking Time

SLOWCHARGESLOW Current modeCHARGE

( Sine-wave decreasing direction )

STEP

Setting current

Coil current

Setting current

Chopping periodChopping period

Blanking Time

Current modeBlanking TimeSLOWSLOWCHARGESLOWBlanking Time

Each of current modes operates with the follow sequence.

The IC enters CHARGE mode at a rising edge of the chopping oscillation. ( A period of CHARGE mode (Blanking Time) is forcibly present in approximately 1μs, regardless of the current value of the coil current (ICOIL) and set current (IREF)).

After the period of the blanking time, the IC operates in CHARGE mode until ICOIL ≥ IREF. After that, the mode switches to the SLOW DECAY mode and the coil current is attenuated until the end of a chopping period.

At the constand-current in SLOW DECAY mode, following to the setting current from the coil current may take time (or not follow) for the current delay attenuation.

No.A1998-16/23

LV8727

FAST DECAY current control operation

When FDT pin voltage is a voltage under 0.8V, the constant-current control is operated in FAST DECAY mode. (Sine-wave inxreasing direction) STEP Setting current Setting current

Coil current Chopping period

Blanking Time

CHARGEFASTCHARGEFAST Current mode

(Sine-wave decreasing direction) STEP

Setting current

Coil current

Setting current

Chopping period

Blanking Time

CHARGEFAST Current modeFASTFASTCHARGEBlanking Time

Each of current modes operates with the follow sequence.

After the period of the blanking time, the IC operates in CHARGE mode until ICOIL ≥ IREF. After that, the mode switches to the FAST DECAY mode and the coil current is attenuated until the end of a chopping period.

At the constand-current control in FAST DECAY mode, following to the setting current from the coil current take short-time for the current fast attenuation, but, the current ripple value may be higher.

No.A1998-17/23

LV8727

MIXED DECAY current control operation

When FDT pin voltage is a voltage between 1.1V to 3.1V or OPEN, the constant-current control is operated in MIXED DECAY mode.

(Sine-wave increasing direction)

STEP

Setting current Setting current Coil current Chopping period

Blanking Time

FASTCHARGESLOWFAST Current modeCHARGESLOW

(Sine-wave decreasing direction)

STEP

Setting current

Coil current

Setting current

Chopping period

Blanking Time

Current modeCHARGESLOWFASTFASTCHARGESLOWBlanking Time

Each of current modes operates with the follow sequence.

In a period of Blanking Time, the coil current (ICOIL) and the setting current (IREF) are compared.

If an ICOIL < IREF state exists during the charge period:

The IC operates in CHARGE mode until ICOIL ≥ IREF. After that, it switches to SLOW DECAY mode and then switches to FAST DECAY mode in the last approximately 1μs of the period. If no ICOIL < IREF state exists during the charge period:

The IC switches to FAST DECAY mode and the coil current is attenuated with the FAST DECAY operation until the end of a chopping period.

The above operation is repeated. Normally, in the sine wave increasing direction the IC operates in SLOW (+ FAST) DECAY mode, and in the sine wave decresing direction the IC operates in FAST DECAY mode until the current is attenuated and reaches the set value and the IC operates in SLOW (+ FAST) DECAY mode.

No.A1998-18/23

LV8727

(13) Output short-circuit protection circuit

Built-in output short-circuit protection circuit makes output to enter in stand-by mode. This function prevents the IC from damaging when the output shorts circuit by a voltage short or a ground short, etc. When output short state is detected, short-circuit detection circuit state the operating and output is once turned OFF. Subsequently, the output is turned ON again after the timer latch period ( typ. 256μs ). If the output remains in the short-circuit state, turn OFF the output, fix the output to the wait mode, and turn ON the EMO output.

When output is fixed in stand-by mode by output short protection circuit, output is released the latch by setting ST = “L”. Output ON

Output ONOutput OFFStandby stateH-bridge

output state

Short-circuitShort-ReleaseShort-circuit detection statecircuit

Internal counter1st counterstart1st counter1st counterstopstart1st counterend2nd counterstart2nd counterendNo.A1998-19/23

LV8727

(15) DOWN output pin

The DOWN output pin is an open-drain connection.

This pin is turned ON when no rising edge of STEP between the input signals while a period determined by a capacitor between OSC2 and GND, and outputs at low levels.

The open-drain output in once turned ON, is turned OFF at the next rising edge of STEP.

Holding current switching time ( Tdown ) is set as shown below by a capacitor between OSC2 pin and GND.

Tdown = Cosc2 х 0.4 х 109 (s)

(Example) When Cosc2 = 1500pF, the STEM signal detection time is shown below.

Tdown = 1500pF х 0.4 х 109 = 0.6 (s)

RotationSTEP inputMotor keepRotationTdownDOWN outputOFFLowOFFBy connecting circumference parts like the example of the following circuit diagram using a DOWN pin, that is a STEP signal is not inputted more than detection time, it is a DOWN output's turning on in the state of holding turning on electricity the position of a stepping motor, and setting current's falling because VREF input voltage's falls, and stopping power consumption -- it can do.

R1VREF

R3R2 DOWN

(Example) When V1=5V, R1=27kΩ, R2=4.7kΩ, R3=1kΩ, the VREF input voltage is shown below.

DOWN output OFF: VREF=V1×R2/(R1+R2)=0.741V

DOWN output ON: VREF=V1×(R2║R3)/ (R1+(R2║R3))=0.126V

No.A1998-20/23

LV8727

Application Circuit Example

LV8727PGND1OUT1BOUT2BPGND2OUT1ADOWNOSC1OSC2FDTRF2241234567891011121314151617181920212223-+-LogicsupplyMMotor connect pinThe above sample application circuit is set to the following conditions: · Constant-current setting

IOUT=VREF/3/RF

(Example) When is VREF=0.9V

IOUT=0.9V/3/0.1Ω=3A

· Chopping frequency setting

Fchop=Ichop/(Cchop×Vt×2)

=10µA/(180pF×0.5V×2)=55.6kHz

-+Logic input180pFNo.A1998-21/23

OUT2A25SGNDSTEPVREFMD1VM1MD2MD3RSTRF1MOOE+STVM2FRLV8727

HZIP25 Heat sink attachment

Heat sinks are used to lower the semiconductor device junction temperature by leading the head generated by the device to the outer environment and dissipating that heat.

a. Unless otherwise specified, for power ICs with tabs and power ICs with attached heat sinks, solder must not be

applied to the heat sink or tabs.

b. Heat sink attachment

· Use flat-head screws to attach heat sinks. · Use also washer to protect the package.

Binding headCountersunk head· Use tightening torques in the ranges 39-59Ncm(4-6kgcm) . machine screwmashine screw· If tapping screws are used, do not use screws with a diameter larger than the holes in the semiconductor device itself.

· Do not make gap, dust, or other contaminants to get between the

Heat sinksemiconductor device and the tab or heat sink.

· Take care a position of via hole . gap· Do not allow dirt, dust, or other contaminants to get between the semiconductor device and the tab or heat sink.

· Verify that there are no press burrs or screw-hole burrs on the heat sink. · Warping in heat sinks and printed circuit boards must be no more than 0.05 mm between screw holes, for either concave or convex warping. · Twisting must be limited to under 0.05 mm.

Via hole· Heat sink and semiconductor device are mounted in parallel. Take care of electric or compressed air drivers

· The speed of these torque wrenches should never exceed 700 rpm, and should typically be about 400 rpm.

c. Silicone grease

· Spread the silicone grease evenly when mounting heat sinks.

· Sanyo recommends YG-6260 (Momentive Performance Materials Japan LLC)

d. Mount

· First mount the heat sink on the semiconductor device, and then mount that assembly on the printed circuit board. · When attaching a heat sink after mounting a semiconductor device into the printed circuit board, when tightening up a heat sink with the screw, the mechanical stress which is impossible to the semiconductor device and the pin doesn't hang.

e. When mounting the semiconductor device to the heat sink using jigs, etc.,

· Take care not to allow the device to ride onto the jig or positioning dowel.

· Design the jig so that no unreasonable mechanical stress is not applied to the semiconductor device.

f. Heat sink screw holes

· Be sure that chamfering and shear drop of heat sinks must not be larger than the diameter of screw head used. · When using nuts, do not make the heat sink hole diameters larger than the diameter of the head of the screws used. A hole diameter about 15% larger than the diameter of the screw is desirable.

· When tap screws are used, be sure that the diameter of the holes in the heat sink are not too small. A diameter about 15% smaller than the diameter of the screw is desirable.

g. There is a method to mount the semiconductor device to the heat sink by using a spring band. But this method is not

recommended because of possible displacement due to fluctuation of the spring force with time or vibration.

No.A1998-22/23

LV8727

SANYOSemiconductorCo.,Ltd.assumesnoresponsibilityforequipmentfailuresthatresultfromusingproductsatvaluesthatexceed,evenmomentarily,ratedvalues(suchasmaximumratings,operatingconditionranges,orotherparameters)listedinproductsspecificationsofanyandallSANYOSemiconductorCo.,Ltd.products described or contained herein.SANYOSemiconductorCo.,Ltd.strivestosupplyhigh-qualityhigh-reliabilityproducts,however,anyandallsemiconductorproductsfailormalfunctionwithsomeprobability.Itispossiblethattheseprobabilisticfailuresormalfunctioncouldgiverisetoaccidentsoreventsthatcouldendangerhumanlives,troublethatcouldgiverisetosmokeorfire,oraccidentsthatcouldcausedamagetootherproperty.Whendesigningequipment,adoptsafetymeasuressothatthesekindsofaccidentsoreventscannotoccur.Suchmeasuresincludebutarenotlimitedtoprotectivecircuitsanderrorpreventioncircuitsforsafedesign,redundantdesign,andstructuraldesign.IntheeventthatanyorallSANYOSemiconductorCo.,Ltd.productsdescribedorcontainedhereinarecontrolledunderanyofapplicablelocalexportcontrollawsandregulations,suchproductsmayrequiretheexport license from the authorities concerned in accordance with the above law.Nopartofthispublicationmaybereproducedortransmittedinanyformorbyanymeans,electronicormechanical,includingphotocopyingandrecording,oranyinformationstorageorretrievalsystem,orotherwise,without the prior written consent of SANYO Semiconductor Co.,Ltd.Anyandallinformationdescribedorcontainedhereinaresubjecttochangewithoutnoticeduetoproduct/technologyimprovement,etc.Whendesigningequipment,refertothe\"DeliverySpecification\"fortheSANYO Semiconductor Co.,Ltd. product that you intend to use.Uponusingthetechnicalinformationorproductsdescribedherein,neitherwarrantynorlicenseshallbegrantedwithregardtointellectualpropertyrightsoranyotherrightsofSANYOSemiconductorCo.,Ltd.oranythirdparty.SANYOSemiconductorCo.,Ltd.shallnotbeliableforanyclaimorsuitswithregardtoathirdparty'sintellctualpropertyrightswhichhasresultedfromtheuseofthetechnicalinformationandproductsmentionedabove.This catalog provides information as of November, 2011. Specifications and information herein are subject to change without notice.

PS No.A1998-23/23

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